DocumentCode
502581
Title
Ultra-thin gate oxide reliability in the ESD time domain
Author
Ille, A. ; Stadler, W. ; Kerber, A. ; Pompl, T. ; Brodbeck, T. ; Esmark, K. ; Bravaix, A.
Author_Institution
Commun. Interface Solutions, Infineon Technol., Munich, Germany
fYear
2006
fDate
10-15 Sept. 2006
Firstpage
285
Lastpage
294
Abstract
The universality of the power-law model for the time to breakdown of thin gate oxides is experimentally established from ldquoDCrdquo down to the ESD regime. This strong gate oxide breakdown voltage acceleration and the cumulative effect of dielectric degradation have severe impacts on the ESD protection development. The statistical aspects of the gate oxide breakdown, its area dependence and the characterization methodology have to be considered for the determination of the ESD design window.
Keywords
electric breakdown; electrostatic discharge; reliability; statistical analysis; voltage measurement; ESD design window; ESD time domain; dielectric degradation; gate oxide breakdown voltage acceleration; power-law model; statistical aspects; ultrathin gate oxide reliability; Breakdown voltage; CMOS process; Degradation; Electric breakdown; Electrical resistance measurement; Electrostatic discharge; Logic testing; Performance evaluation; Protection; Stress;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Overstress/Electrostatic Discharge Symposium, 2006. EOS/ESD '06.
Conference_Location
Anaheim, CA
Print_ISBN
978-1-5853-7115-0
Type
conf
Filename
5256767
Link To Document