Title :
Relations between system level ESD and (vf-)TLP
Author :
Smedes, T. ; van Zwol, J. ; de Raad, G. ; Brodbeck, T. ; Wolf, H.
Author_Institution :
Philips Semicond., Nijmegen, Netherlands
Abstract :
This paper shows that device robustness for system level ESD scales linearly with device width. Relations between system level failure voltages and TLP failure currents are established. Most compound structures follow the same relations. The exceptions have a different failure mechanism, which is shown to correlate with vf-TLP characterisation. The results enable predictive simulations for system level ESD robust designs.
Keywords :
electrostatic discharge; failure analysis; integrated circuit testing; semiconductor device testing; TLP failure currents; device robustness; failure mechanism; system level ESD; system level failure voltages; vf-TLP characterisation; Circuit testing; Diodes; Electrostatic discharge; Failure analysis; Predictive models; Protection; Robustness; Stress; System testing; Voltage;
Conference_Titel :
Electrical Overstress/Electrostatic Discharge Symposium, 2006. EOS/ESD '06.
Conference_Location :
Anaheim, CA
Print_ISBN :
978-1-5853-7115-0
