DocumentCode :
502611
Title :
ESD protection for high-voltage CMOS technologies
Author :
Quittard, O. ; Mrcarica, Z. ; Blanc, F. ; Notermans, G. ; Smedes, T. ; van Zwol, H.
Author_Institution :
Philips Semicond., Zurich, Switzerland
fYear :
2006
fDate :
10-15 Sept. 2006
Firstpage :
77
Lastpage :
86
Abstract :
Two types of ESD protection for high-voltage CMOS technologies are presented. Both solutions can be readily ported between different HV CMOS process options and applications with different supply voltages. One is a stack of low-voltage transistors offering both a scalable triggering and holding voltage. The second is an RC-triggered HV-MOSFET using a novel compact triggering stage.
Keywords :
CMOS integrated circuits; electrostatic discharge; low-power electronics; ESD protection; high-voltage CMOS technologies; low-voltage transistors; Bipolar transistors; CMOS process; CMOS technology; Circuits; Clamps; Electrostatic discharge; MOSFETs; Protection; Robustness; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Overstress/Electrostatic Discharge Symposium, 2006. EOS/ESD '06.
Conference_Location :
Anaheim, CA
Print_ISBN :
978-1-5853-7115-0
Type :
conf
Filename :
5256797
Link To Document :
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