Title :
Investigation of ESD protection elements under high current stress in CDM-like time domain using backside laser interferometry
Author :
Bychikhin, S. ; Dubec, V. ; Litzenberger, M. ; Pogany, D. ; Gornik, E. ; Groos, G. ; Esmark, K. ; Stecher, M. ; Stadler, W. ; Gieser, H. ; Wolf, H.
Author_Institution :
Institute for Solid State Electronics, Vienna University of Technology, Floragasse 7, A-1040, Austria
Abstract :
Switching dynamics and current flow homogeneity under very fast TLP (vf-TLP) stress is investigated in smart power and CMOS technology ESD protection devices by means of optical transient interferometric mapping (TIM) techniques with sub-nanosecond time resolution. Comparison between the device behavior under vf- and conventional TLP stress is discussed. The sub-ns time resolution enables a detailed insight into the triggering behavior of protection elements.
Keywords :
CMOS technology; Diodes; Electrostatic discharge; Electrostatic interference; Integrated circuit modeling; Interferometry; Internal stresses; Protection; Thermal stresses; Thyristors;
Conference_Titel :
2002 Electrical Overstress/Electrostatic Discharge Symposium, 2002. EOS/ESD '02.
Conference_Location :
Charlotte, NC, USA
Print_ISBN :
978-1-5853-7040-5
Electronic_ISBN :
978-1-5853-7040-5
