Modelling and extraction of RF performance parameters of CMOS Electrostatic Discharge protection devices

The HF parasitic behaviour of two terminal, CMOS Electrostatic Discharge (ESD) protection devices is studied. Basic small signal RC equivalent models and corresponding parameter extraction procedures, applicable for the most typical structures such as ggNMOS, diodes and SCR´s are presented. A new de-embedding procedure, not requiring bulky ‘dummy’ (open, short) structures, is developed to allow easy S-parameter evaluation of the ESD devices from the most often used, two terminal ESD characterization test arrays. Finally, the impact of the ESD protection device failure on the overall RF circuit performance is discussed.