DocumentCode
502691
Title
A study of flip-flop IC upset exposed by ESD radiated fields
Author
Honda, Masamitsu
Author_Institution
Impulse Physics Laboratory, Inc. 1-3-10 Shinyokohama, Suite 402, Kouhoku-ku Yokohama 222-0033, Japan
fYear
2002
fDate
6-10 Oct. 2002
Firstpage
47
Lastpage
51
Abstract
How ESD events cause upset to devices is discussed. A flip-flop IC (type “74xx74”) is used as a test device to observe how ESD fields are coupled into devices. EMI from the ESD event is measured as well as the di/dt characteristics of metal objects. It was determined that the IC upset can occur under low-voltage ESD (such as 600V) and normal digital circuit operating conditions. Contributing factors to IC upset problems will be given.
Keywords
Biological system modeling; Cables; Coupling circuits; Digital integrated circuits; Electromagnetic interference; Electrostatic discharge; Flip-flops; Humans; Integrated circuit modeling; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
2002 Electrical Overstress/Electrostatic Discharge Symposium, 2002. EOS/ESD '02.
Conference_Location
Charlotte, NC, USA
Print_ISBN
978-1-5853-7040-5
Electronic_ISBN
978-1-5853-7040-5
Type
conf
Filename
5267041
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