DocumentCode
502986
Title
Implementation of diode and bipolar triggered SCRs for CDM robust ESD protection in 90nm CMOS ASICs
Author
Brennan, Ciaran J. ; Chang, Shunhua ; Woo, Min ; Chatty, Kiran ; Gauthier, Robert
Author_Institution
IBM Microelectron., Essex Junction, VT, USA
fYear
2005
fDate
8-16 Sept. 2005
Firstpage
1
Lastpage
7
Abstract
We report the characterization of diode and bipolar triggered SCRs with VFTLP measurements and product ESD testing. A dual base Darlington bipolar triggered SCR (DbtSCR) in a triple well structure is demonstrated to provide 4 KV HBM, 300 V MM and 1000 V CDM protection for 90 nm ASIC I/Os. A very fast turn-on time of 460 ps was measured for the DbtSCR, compared to 8 ns for a diode triggered SCR.
Keywords
CMOS integrated circuits; application specific integrated circuits; electrostatic discharge; thyristors; trigger circuits; CDM robust ESD protection; CMOS ASIC process; Darlington bipolar-triggered SCR; VFTLP measurement; diode-triggered SCR; size 90 nm; time 460 ps; Application specific integrated circuits; CMOS technology; Circuit testing; Clamps; Diodes; Electrostatic discharge; Impedance; Protection; Robustness; Thyristors;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Overstress/Electrostatic Discharge Symposium, 2005. EOS/ESD '05.
Conference_Location
Tucson, AZ
Print_ISBN
978-1-58537-069-6
Electronic_ISBN
978-1-58537-069-6
Type
conf
Filename
5271741
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