Title :
Co-design methodology to provide high ESD protection levels in the advanced RF circuits
Author :
Vassilev, V. ; Thijs, S. ; Segura, P. Lajo ; Leroux, P. ; Wambacq, P. ; Groeseneken, G. ; Natarajan, M.I. ; Steyaert, M. ; Maes, H.E.
Author_Institution :
IMEC, Leuven, Belgium
Abstract :
This paper describes an approach to design ESD protection for integrated Low Noise Amplifier (LNA) circuits, used in narrowband transceiver front-ends. The RF constraints on the ESD devices are relaxed by co-designing the RF and the ESD blocks, considering them as one single circuit to optimize. The method is applied to the design of 0.25 mum CMOS LNA. Circuit protection levels higher than 3 kV HBM stress are achieved using conventional high capacitive ggNMOS snapback devices.
Keywords :
CMOS integrated circuits; UHF amplifiers; UHF integrated circuits; electrostatic discharge; low noise amplifiers; transceivers; CMOS LNA; ESD protection; RF circuits; circuit protection; co-design methodology; integrated low noise amplifier; narrowband transceiver front-ends; size 0.25 mum; Circuits; Constraint optimization; Electrostatic discharge; Low-noise amplifiers; Narrowband; Protection; Radio frequency; Radiofrequency amplifiers; Stress; Transceivers;
Conference_Titel :
Electrical Overstress/Electrostatic Discharge Symposium, 2003. EOS/ESD '03.
Conference_Location :
Las Vegas, NV
Print_ISBN :
978-1-5853-7057-3
Electronic_ISBN :
978-1-5853-7057-3
