DocumentCode
503068
Title
High abstraction level permutational ESD concept analysis
Author
Streibl, M. ; Zangl, F. ; Esmark, K. ; Schwencker, R. ; Stadler, W. ; Gossner, H. ; Druen, S. ; Schmitt-Landsiedel, D.
Author_Institution
Infineon Technol., CL DAT LIB IO, Munich, Germany
fYear
2003
fDate
21-25 Sept. 2003
Firstpage
1
Lastpage
9
Abstract
A simulation approach is presented that allows to handle ESD simulation and analysis on a chip level complexity. In a Monte-Carlo like permutational simulation approach worst case ESD paths are identified. The simulator is embedded in an ESD analysis framework spanning from the chip protection description to an automated virtual HBM test routine with a respective fail reporting interface. The tools capabilities are demonstrated in the ESD analysis of a complex mixed signal design.
Keywords
Monte Carlo methods; electrostatic discharge; Monte Carlo; automated virtual HBM test routine; chip level complexity; chip protection; permutational ESD concept analysis; Analytical models; Automatic testing; Circuit simulation; Circuit testing; Computational modeling; Electrostatic discharge; Failure analysis; Packaging; Protection; Signal analysis;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Overstress/Electrostatic Discharge Symposium, 2003. EOS/ESD '03.
Conference_Location
Las Vegas, NB
Print_ISBN
978-1-5853-7057-3
Electronic_ISBN
978-1-5853-7057-3
Type
conf
Filename
5272031
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