Title :
Wafer post-processing for a reconfigurable wafer-scale circuit board
Author :
Radji, Moufid ; Lakhssassi, Ahmed ; Bougataya, Mohammed ; Hamoui, Anas ; Izquierdo, Ricardo
Author_Institution :
Electr. & Comput. Eng. Dept., McGill Univ., Montreal, QC, Canada
Abstract :
The WaferBoardtrade rapid prototyping platform for electronic systems is proposed as a tool to help meet today´s tight delivery time, performance and reliability constraints. At the core of WaferBoardtrade is the WaferICtrade, a wafer-scale reconfigurable CMOS circuit. At the surface of this complex circuit is a sea of identical contacts, any pair of which can be interconnected through a mesh grid network called WaferNettrade. The user can simply deposit packaged integrated circuits on the smart active surface, and then a complex interconnect pattern between these ICs can be established in a matter of minutes. As is the case with development of any novel technology, design of the platform poses several technical challenges. Postprocessing tasks to be accomplished on the CMOS wafer are laid out hereafter. A .18mum CMOS TestChip fabricated to validate the WaferICtrade concept on a 1/100th scale is outlined. Furthermore, sample microfabrication results, such as TSV etching, are presented along with thermo-mechanical investigation outcomes.
Keywords :
CMOS integrated circuits; grid computing; microfabrication; printed circuits; WaferBoard rapid prototyping platform; complex circuit; complex interconnect pattern; electronic systems; etching; mesh grid network; microfabrication; packaged integrated circuits; reconfigurable wafer-scale circuit board; reliability constraints; size 0.18 mum; smart active surface; thermo-mechanical investigation; tight delivery time; wafer post-processing; wafer-scale reconfigurable CMOS circuit; CMOS technology; Integrated circuit interconnections; Integrated circuit packaging; Integrated circuit technology; Ocean temperature; Printed circuits; Prototypes; Sea surface; Testing; Through-silicon vias; Electronic Prototyping; Thermo-Mechanical Analysis; Through Silicon Vias; Wafer-Scale Integration;
Conference_Titel :
Microelectronics and Packaging Conference, 2009. EMPC 2009. European
Conference_Location :
Rimini
Print_ISBN :
978-1-4244-4722-0
Electronic_ISBN :
978-0-6152-9868-9