DocumentCode :
503143
Title :
Application of 3D modeling tools for advanced packaging on a broad range of industrial applications
Author :
Imbs, Yvon ; Marechal, Laurent ; Auchere, David ; Graziosi, Giovanni ; Debono, Jason
Author_Institution :
STMicroelectronics Grenoble, Grenoble, France
fYear :
2009
fDate :
15-18 June 2009
Firstpage :
1
Lastpage :
8
Abstract :
The scope of this article is concerning the electrical modeling tools used for the package parasitic extraction. Many 3D electrical modeling tools are on the market today enabling different type of electrical models to represent the electrical behavior of the packages. Semi-conductor companies are using many of them to address a wide range of applications, going from Communications, Consumer and Computer to Automotive and Industrial market segments. To get the right performances at the rights cost for all of these applications, the diversity of developed packages is considerable requesting also several strategies for the electrical modeling. In parallel, IC interfaces speed is increasing for many of these applications fields and the new SOCs (System on Chip) are including more and more interfaces like USB, SATA etc... This is leading to an increasing impact of the package in term of electrical behavior. This trend makes electrical models mandatory for packages in a growing part of the product designs. This paper will present several types of packages to be modeled to cover the different products. The usage and limitations of several modeling tools in regards with the applications will also be presented. Some additional limitations will appear for advanced packaging required by the most challenging products. Finally, the direction chosen to overcome these challenges through increasing collaborative work with CAD vendors and Institutions will be presented.
Keywords :
integrated circuit modelling; integrated circuit packaging; system-on-chip; 3D electrical modeling tools; IC interfaces speed; advanced packaging; electrical behavior; electrical models; industrial applications; package parasitic extraction; product designs; semiconductor companies; system on chip; Application software; Application specific integrated circuits; Automotive engineering; Communication industry; Computer industry; Costs; Packaging; Product design; System-on-a-chip; Universal Serial Bus; Full Wave; Modeling; Packaging; Quasi-static;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronics and Packaging Conference, 2009. EMPC 2009. European
Conference_Location :
Rimini
Print_ISBN :
978-1-4244-4722-0
Electronic_ISBN :
978-0-6152-9868-9
Type :
conf
Filename :
5272905
Link To Document :
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