DocumentCode
503177
Title
Stacking of full rebuilt wafers for sip and abandoned sensors/applications
Author
Val, Christian ; Couderc, Pascal ; Lartigues, Pierre
Author_Institution
3D PLUS, Buc, France
fYear
2009
fDate
15-18 June 2009
Firstpage
1
Lastpage
9
Abstract
Miniaturisation for commercial applications demands very high interconnection densities and low costs. Wiser for former experiences, multi-chip modules, wafer scale integration, 3-D modules for space, defense and professional (3D Plus) applications, we learned that the yield constituted an important part of the production costs. The WDoD process allows to stack known good rebuilt wafer (KGRW) only. Several applications in the medical and industrial domains have been presented. This extremely important densification of 10 to 20 levels per mm with only 100 mum around the largest die allows to launch extremely ambitious applications with memories, systems in package and abandoned sensors.
Keywords
densification; integrated circuit interconnections; multichip modules; stacking; system-in-package; wafer-scale integration; 3D Plus applications; 3D modules; SiP; WDoD process; abandoned sensors; densification; full rebuilt wafers; interconnection densities; multichip modules; stacking; systems in package; wafer scale integration; Multichip modules; Packaging; Random access memory; Semiconductor device manufacture; Silicon; Stacking; Through-silicon vias; Wafer bonding; Wafer scale integration; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronics and Packaging Conference, 2009. EMPC 2009. European
Conference_Location
Rimini
Print_ISBN
978-1-4244-4722-0
Electronic_ISBN
978-0-6152-9868-9
Type
conf
Filename
5272941
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