90nm node RF CMOS technology with latch-up immunity on high-resistivity substrate

This paper presents a detailed analysis of latch-up characteristics for 90 nm RF CMOS on high-resistivity substrate with 400 ohm-cm for the first time. According to our measurement and simulation results, latch-up dependence of PNP base and NPN emitter injection mode on Si substrate resistivity is small. On the other hand, PNP emitter and NPN base injection modes are sensitive to the resistivity because the substrate increases the base resistance of NPN bipolar in latchup events. The trigger switching current of latch-up decrease as the resistivity increases for those modes. In order to suppress the degradation, an additional ion implantation is effective because resistance of the base region can be reduced. The 90 nm node RF CMOS with high-Q inductor, low-loss transmission line and low substrate noise can be realized without the degradation of latchup, leakage current between n-wells by an additional ion implantation.