DocumentCode :
503776
Title :
Physical implementation of 3D integrated solenoids within silicon substrate for hybrid IC applications
Author :
Duplessis, M. ; Tesson, O. ; Neuilly, F. ; Tenailleau, J.R. ; Descamps, P.
Author_Institution :
NXP Semicond., Caen, France
fYear :
2009
fDate :
Sept. 29 2009-Oct. 1 2009
Firstpage :
1006
Lastpage :
1009
Abstract :
This paper presents an original concept of a 3D solenoid realized in a 300 μm depth High Resistivity Silicon (HRS) substrate using the Through Silicon Via (TSV) interconnection technology. Electrical performances deduced from two-ports S-parameters are reported. A comparison is performed considering first conventional O-shaped planar BiCMOS (Al Back-end) inductor, then a CMOS (45 nm node, Cu Back-end) O-shaped inductor respect to area occupation together with electrical performances. A predictive electrical model is proposed and compared to measurement results. Correlations between simulation and measurements are found satisfactory.
Keywords :
S-parameters; hybrid integrated circuits; multichip modules; solenoids; 3D integrated solenoids; S-parameters; high resistivity silicon substrate; hybrid IC applications; through silicon via interconnection technology; Application specific integrated circuits; BiCMOS integrated circuits; CMOS technology; Conductivity; Hybrid integrated circuits; Inductors; Scattering parameters; Silicon; Solenoids; Through-silicon vias;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave Conference, 2009. EuMC 2009. European
Conference_Location :
Rome
Print_ISBN :
978-1-4244-4748-0
Type :
conf
Filename :
5295975
Link To Document :
بازگشت