DocumentCode :
504987
Title :
A PWM motor speed control system based on the dual-loop PLL
Author :
Machida, Hidekazu ; Kambara, Michinobu ; Tanaka, Kohta ; Yamochi, Taisuke ; Kobayashi, Fuminori
Author_Institution :
Maizuru Coll. of Technol., Kyoto, Japan
fYear :
2009
fDate :
18-21 Aug. 2009
Firstpage :
418
Lastpage :
423
Abstract :
PLL motor speed control systems can completely reject speed error and steady-state phase error for constant-speed input signals. However, it is not usually applied to systems with inputs including acceleration, because they have poor tracking speed and strange pull-in behavior. In the field of radio communication, "dual-loop PLL" is very effective for such signals. It can not only enable high-speed tracking, but also cancel phase error. This article shows that the principle can be applied, with some devices, to motor speed control, and a prototype implementation using PWM is described. Two supplemental techniques, called "active feedforward" and "active limiter", are also incorporated, to achieve faster tracking and speed limitation. The scheme was implemented by programming an FPGA, and satisfiable results were obtained.
Keywords :
machine control; phase locked loops; pulse width modulation; velocity control; FPGA; PWM motor speed control system; active feedforward; active limiter; dual-loop PLL; radio communication; Error correction; Feedback loop; Filters; Frequency; Phase detection; Phase locked loops; Pulse width modulation; Steady-state; Velocity control; Voltage-controlled oscillators; FPGA; PLL; PWM; dual loop; motor;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ICCAS-SICE, 2009
Conference_Location :
Fukuoka
Print_ISBN :
978-4-907764-34-0
Electronic_ISBN :
978-4-907764-33-3
Type :
conf
Filename :
5335093
Link To Document :
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