DocumentCode
505536
Title
IGBT plugged in SCR device for ESD protection in advanced CMOS technology
Author
Shrivastava, Mayank ; Schneider, Jens ; Jain, Ruchil ; Baghini, Maryam Shojaei ; Gossner, Harald ; Rao, V. Ramgopal
Author_Institution
Dept. of Electr. Eng., Indian Inst. of Technol.-Bombay, Mumbai, India
fYear
2009
fDate
Aug. 30 2009-Sept. 4 2009
Firstpage
1
Lastpage
9
Abstract
We have proposed modifications in the standard SCR structure to inherently improve quasi static triggering voltage, transient overshoot and trigger time without changing its failure threshold and holding voltage. The device is an useful option for the protection of low voltage interfaces and power domains in advanced CMOS reaching from 1 V to 3.6 V.
Keywords
CMOS integrated circuits; electrostatic discharge; insulated gate bipolar transistors; thyristors; ESD protection; IGBT; SCR device; advanced CMOS technology; failure threshold; holding voltage; low voltage interfaces; power domains; quasi static triggering voltage; transient overshoot; trigger time; voltage 1 V to 3.6 V; CMOS process; CMOS technology; Doping; Electrostatic discharge; Implants; Insulated gate bipolar transistors; Low voltage; Protection; Threshold voltage; Thyristors;
fLanguage
English
Publisher
ieee
Conference_Titel
EOS/ESD Symposium, 2009 31st
Conference_Location
Anaheim, CA
Print_ISBN
978-1-58537-176-1
Electronic_ISBN
978-1-58537-176-1
Type
conf
Filename
5340123
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