Title :
Metal and silicon burnout failures from CDM ESD testing
Author :
Anderson, Warren R. ; Eppes, David ; Beebe, Stephen
Author_Institution :
Adv. Micro Devices Inc., Boxborough, MA, USA
fDate :
Aug. 30 2009-Sept. 4 2009
Abstract :
Large microprocessors under typical CDM qualification conditions of 500 V exhibit unexpected damage to metal lines, vias, and the active area. Even when designed with reasonable practices, bump metal wiring and ESD devices can fail from current crowding effects, which are exacerbated by the smaller interconnect geometry in advanced CMOS processes.
Keywords :
CMOS digital integrated circuits; electrostatic discharge; failure analysis; integrated circuit interconnections; integrated circuit testing; microprocessor chips; CDM ESD testing; CMOS processes; ESD devices; bump metal wiring; burnout failures; current crowding effects; interconnect geometry; microprocessors; voltage 500 V; Electrostatic discharge; Silicon; Testing;
Conference_Titel :
EOS/ESD Symposium, 2009 31st
Conference_Location :
Anaheim, CA
Print_ISBN :
978-1-58537-176-1
Electronic_ISBN :
978-1-58537-176-1
