• DocumentCode
    505564
  • Title

    Diode isolation concept for low voltage and high voltage protection applications

  • Author

    Lin, Yen-Yi ; Duvvury, Charvaka ; Jahanzeb, Agha ; Vassilev, Vesselin

  • Author_Institution
    Diodes Inc., Dallas, TX, USA
  • fYear
    2009
  • fDate
    Aug. 30 2009-Sept. 4 2009
  • Firstpage
    1
  • Lastpage
    7
  • Abstract
    The diode isolation concept was exploited experimentally to grounded gate NMOS transistors and grounded gate DeNMOS transistors for robust ESD protections. The It2, holding voltage, and triggering voltage are improved by applying this concept. It is a novel optimization concept for both low voltage and high voltage ESD protection design.
  • Keywords
    CMOS logic circuits; MOSFET; electrostatic discharge; semiconductor diodes; CMOS dual oxide technology; ESD protection; diode isolation; electrostatic discharge protection; grounded gate DeNMOS transistors; grounded gate NMOS transistors; high voltage protection; holding voltage; triggering voltage; CMOS technology; Capacitance; Diodes; Electrostatic discharge; Isolation technology; Low voltage; MOS devices; MOSFETs; Protection; Robustness;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    EOS/ESD Symposium, 2009 31st
  • Conference_Location
    Anaheim, CA
  • Print_ISBN
    978-1-58537-176-1
  • Electronic_ISBN
    978-1-58537-176-1
  • Type

    conf

  • Filename
    5340155
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=505564