DocumentCode
506010
Title
GRAPE-DR: 2-Pflops massively-parallel computer with 512-core, 512-Gflops processor chips for scientific computing
Author
Makino, Junichiro ; Hiraki, Kei ; Inaba, Mary
Author_Institution
National Astronomical Observatory of Japan, Tokyo, Japan
fYear
2007
fDate
10-16 Nov. 2007
Firstpage
1
Lastpage
11
Abstract
We describe the GRAPE-DR (Greatly Reduced Array of Processor Elements with Data Reduction) system, which will consist of 4096 processor chips each with 512 cores operating at the clock frequency of 500 MHz. The peak speed of a processor chip is 512Gflops (single precision) or 256 Gflops (double precision). The GRAPE-DR chip works as an attached processor to standard PCs. Currently, a PCI-X board with single GRAPE-DR chip is in operation. We are developing a 4-chip board with PCI-Express interface, which will have the peak performance of 1 Tflops. The final system will be a cluster of 512 PCs each with two GRAPE-DR boards. We plan to complete the final system by early 2009. The application area of GRAPE-DR covers particle-based simulations such as astrophysical many-body simulations and molecular-dynamics simulations, quantum chemistry calculations, various applications which requires dense matrix operations, and many other compute-intensive applications.
Keywords
Arithmetic; Clocks; Computational modeling; Computer science; Frequency; Government; Information science; Pipelines; Scientific computing; Space technology;
fLanguage
English
Publisher
ieee
Conference_Titel
Supercomputing, 2007. SC '07. Proceedings of the 2007 ACM/IEEE Conference on
Conference_Location
Reno, NV, USA
Print_ISBN
978-1-59593-764-3
Electronic_ISBN
978-1-59593-764-3
Type
conf
DOI
10.1145/1362622.1362647
Filename
5348841
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