DocumentCode :
507435
Title :
GRPlacer: Improving routability and wire-length of global routing with circuit replacement
Author :
Dai, Ke-Ren ; Lu, Chien-Hung ; Li, Yih-Lang
Author_Institution :
Dept. of Comput. Sci., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fYear :
2009
fDate :
2-5 Nov. 2009
Firstpage :
351
Lastpage :
356
Abstract :
Placement profoundly impacts physical design owing to its role in determining the lower bound of a circuit wirelength, as well as the circuit routability. To close the gap between placement and routing, this study integrates global routing and placement to improve the wirelength estimation accuracy of placement. Two methods, called wirelength-reduced cell shifting and cell rearrangement by bipartite matching, are applied to minimize wirelength. Cell sorting based congestion reduction and pattern-prerouting based congestion-avoided cell shifting are proposed to reduce congestion. Experimental results demonstrate that the proposed placer improves total routed wirelength by 2% to ROOSTER on IBMv2 benchmarks. Moreover, the proposed GRPlacer resolves the original congested regions of the placements generated by ROOSTER. Compare with the detailed placer in ROOSTER, our work can reduce more routed wire length and remove more overflows.
Keywords :
circuit CAD; integrated circuit layout; network routing; GRPlacer; IBMv2 benchmarks; ROOSTER placers; bipartite matching; cell rearrangement; cell sorting; circuit routability; congestion-avoided cell shifting; global routing; pattern-prerouting; wirelength-reduced cell shifting; Circuits; Computer science; Delay; Minimization; Pins; Routing; Sorting; Very large scale integration; White spaces; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer-Aided Design - Digest of Technical Papers, 2009. ICCAD 2009. IEEE/ACM International Conference on
Conference_Location :
San Jose, CA
ISSN :
1092-3152
Print_ISBN :
978-1-60558-800-1
Electronic_ISBN :
1092-3152
Type :
conf
Filename :
5361270
Link To Document :
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