FPGA implementation of SNR estimation for DSSS signal of space borne secondary radar

According to the problem of SNR estimation for DSSS signal in space borne secondary radar, an efficient approach has been presented. For the implementation of real-time processing of SNR estimation, the efficiency is improved by the redesign of the algorithm flow. Moreover, the SNR estimation is accomplished on a large-scale programmable gate array with the capability of processing high resolution. Simulation results indicate that the principle of the method is correct. Taking into account the space condition, the method performs well.