DocumentCode :
508570
Title :
Design of RVD radar if signal simualtor based on FPGA
Author :
Zhou Jian ; Han Feng ; Wu Siliang
Author_Institution :
Dept. of Electron. Eng., Beijing Inst. of Technol., Beijing
fYear :
2009
fDate :
20-22 April 2009
Firstpage :
1
Lastpage :
4
Abstract :
Spacecraft rendezvous and docking (RVD) is one of the major tasks in space flight mission. This study discusses an approach for simulating the intermediate frequency (IF) signals which the RVD radar received based on the principle of direct digital synthesizer (DDS). The velocity, distance simulation and noise generator are presented respectively. The whole simulation system was implemented on the platform of field- programmable gate array (FPGA).
Keywords :
field programmable gate arrays; radar signal processing; space vehicles; spaceborne radar; FPGA; RVD radar; direct digital synthesizer; distance simulation; field- programmable gate array; intermediate frequency signals; noise generator; signal simulator; space flight mission; spacecraft rendezvous and docking; direct digital synthesizer (DDS); field-programmable gate array (FPGA); rendezvous and docking (RVD); signal simulator; spread spectrum;
fLanguage :
English
Publisher :
iet
Conference_Titel :
Radar Conference, 2009 IET International
Conference_Location :
Guilin
ISSN :
0537-9989
Print_ISBN :
978-1-84919-010-7
Type :
conf
Filename :
5367433
Link To Document :
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