Sigma-delta modulator for low power with SC techniques

ADC is very important for the receiver and transmitter in radar system. The performance affects the signal process precision in the front. And for the low power requirement, here a sigma-delta modulator of second-order with SC techniques is shown in this paper in 0.5 um CMOS process. SC techniques present a discrete low power system without continues current transmission. And a low power op amplifier with continuous common-mode feedback and a dynamic comparator is also designed. This new amp works under the supply of 3.3 v and with the direct current of 400 uA. This system is simulated by Matlab, while the circuit is designed by Cadence in 0.5 um CMOS (3.3 v model) process. The modulator achieves over 82 dB dynamic range in 24-kHz signal bandwidth with OSR=128. And it consumes 3 mW under 3.3 v supply voltage.