Title :
Reducing Energy at the Minimum Energy Operating Point Via Statistical Error Compensation
Author :
Abdallah, Rami A. ; Shanbhag, Naresh R.
Author_Institution :
Visual & Parallel Comput. Group, Intel Corp., Hillsboro, OR, USA
Abstract :
This paper demonstrates that statistical error compensation reduces the energy consumption Emin at the minimum energy operating point (MEOP), which is known to occur in the subthreshold regime. In particular, the impact of algorithmic noise-tolerance (ANT) [1], in conjunction with frequency overscaling (FOS) and voltage overscaling, is studied in the context of an eight-tap finite impulse response (FIR) filter in a 45-nm CMOS process. At the nominal process corner and using low-Vt devices, we show that the ANT-based FIR filter achieves 20%-47% reduction in Emin and a 1.8×-2.25× increase in the frequency of operation over a conventional (error free) filter operating at its MEOP. This result is achieved via the ability of ANT to compensate for a precompensation error rate of 70%-85%. The use of high-Vt devices reduces Emin by 10%. This is due to the reduced effectiveness of FOS and increased sensitivity of delay to voltage variations. In the presence of process variations, the ANT-based FIR filter reduces Emin by 54% over a transistor up-sized design while meeting a fixed throughput constraint, and a parametric yield of 99.7%.
Keywords :
CMOS integrated circuits; FIR filters; energy consumption; error compensation; ANT-based FIR filter; CMOS process; MEOP; algorithmic noise-tolerance; energy consumption; error free filter; finite impulse response filter; frequency overscaling; minimum energy operating point; precompensation error rate; size 45 nm; statistical error compensation; subthreshold regime; transistor up-sized design; voltage overscaling; Delays; Energy consumption; Error analysis; Finite impulse response filters; Logic gates; Signal to noise ratio; Threshold voltage; Error resiliency; minimum energy; subthreshold; ultralow power (ULP); voltage overscaling; voltage overscaling.;
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
DOI :
10.1109/TVLSI.2013.2271838