Title :
Proactive transaction scheduling for contention management
Author :
Blake, Geoffrey ; Dreslinski, Ronald G. ; Mudge, Trevor
Author_Institution :
Univ. of Michigan, Ann Arbor, MI, USA
Abstract :
Hardware transactional memory offers a promising high performance and easier to program alternative to lock-based synchronization for creating parallel programs. This is particularly important as hardware manufacturers continue to put more cores on die. But transactional memory still has one main drawback: contention. Contention is caused by multiple transactions trying to speculatively modify the same memory location concurrently causing one or more transactions to abort and retry its execution. Contention serializes the execution, meaning high contention leads to very poor parallel performance. As more cores are added, contention worsens. To date contention-manager designs have been primarily reactive in nature and limited to various forms of randomized backoff to effectively stall contending transactions when conflicts occur. While backoff-based managers have been popular due to their simplicity, at higher core counts our analysis on the STAMP benchmark suite shows that backoff-based managers perform poorly. In particular, small groups of transactions create hot spots of contention that lead to this poor performance. We show these hot spots commonly consist of small sets of conflicts that occur in a predictable manner. To counter this challenge we introduce a dynamic contention management strategy that minimizes contention by using past history to identify when these hot spots will reoccur in the future and proactively schedule affected transactions around these hot spots. The strategy used predicts future contention and schedules to avoid it at runtime without the need for programmer input. Our experiments show that by using our proactive scheduling technique we outperform a backoff-based policy for a 16 processor system by an average of 85%.
Keywords :
parallel programming; scheduling; storage management chips; synchronisation; STAMP benchmark suite; backoff-based managers; date contention-manager designs; dynamic contention management strategy; hardware transactional memory; lock-based synchronization; parallel programs; proactive transaction scheduling; Content management; Counting circuits; Dynamic scheduling; Hardware; History; Job shop scheduling; Manufacturing; Performance analysis; Processor scheduling; Runtime; Hardware transactional memory; Proactive scheduling; Software runtime;
Conference_Titel :
Microarchitecture, 2009. MICRO-42. 42nd Annual IEEE/ACM International Symposium on
Conference_Location :
New York, NY
Print_ISBN :
978-1-60558-798-1