Title :
Novel security strategies for SRAM in powered-off state to resist physical attack
Author :
Wenjing, Kang ; Kai, Yu ; Guoyi, Yu ; Xuecheng, Zou
Author_Institution :
Dept. of Electron. Sci. & Technol., Huazhong Univ. of Sci. & Technol., Wuhan, China
Abstract :
This paper presents two security strategies for resisting physical attack utilizing data remanence of SRAM in powered-off state. Secure circuits including power supply, power supply selector, powered-off detector, and erase or rewrite circuit are integrated into conventional SRAM to realize erase or rewrite operations and avoid being disassembled by attackers. Implemented with 0.25 ¿m HHNEC CMOS technology, two SRAMs exploiting different strategies show data remanence is successfully eliminated or altered with only 4% and 5% power increased respectively.
Keywords :
CMOS integrated circuits; SRAM chips; power supply circuits; SRAM security strategies; erase circuit; physical attack; power supply selector; powered-off detector; rewrite circuit; size 0.25 mum; CMOS technology; Data security; Integrated circuit technology; Paper technology; Power supplies; Random access memory; Remanence; Resists; Space charge; Temperature; Data remanence; Low-voltage low-power; Physical attack; SRAM; Security strategy;
Conference_Titel :
Integrated Circuits, ISIC '09. Proceedings of the 2009 12th International Symposium on
Conference_Location :
Singapore
Print_ISBN :
978-9-8108-2468-6