Via-programmable logic array VPEX2 with configurable DFF using 2 logic elements

We have been studied the VPEX (via programmable logic using exclusive or array) architecture whose logic element (LE) consist of the combination of AOI21, NOR and NOT gates. We adopted ¿configurable DFF architecture¿ which means that a DFF can be configured using few LEs on demand. In the former VPEX architecture called VPEX1, 4 LEs are needed to configure a DFF. In the new VPEX architecture called VPEX2, a DFF can be composed of 2 LEs by applying novel technique in which NOR gate is changed to 2 transmission gates by the isolation of active region. The sample circuits area are 20-30% decreased because of the reduction of DFF area. Furthermore, auxiliary NOT gate is attached to the LE, and the circuit composition for 6 logic functions are optimized. The gate delay time for optimized logic functions are decreased by 20-50%. These data suggests that the VPEX2 LE will be a good candidate for practical via-programmable logic devices.