Title :
An ultra low-power CMOS EMG amplifier with high efficiency in operation frequency per power
Author :
Jaya, Gibran Limi ; Chan, P.K.
Author_Institution :
Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, Singapore
Abstract :
A new ultra low-power CMOS Electromyograph (EMG) amplifier is presented in this paper. It is based on the application of a novel capacitive load reduction circuit technique to the capacitive-reset switched-capacitor circuit architecture. This is achieved by adding a capacitor in series with the capacitive load of the amplifier so as to reduce the total effective load capacitance being seen by the op-amp for reducing power driving requirement. The amplifier is designed using CSM 1.8 V 0.18 ¿m triple-well CMOS process technology and simulated using realistic BSIM3 models. The amplifier dissipates only 15.14 ¿W at a dual power supply of ±0.9 V. It has has a gain of 40 dB at dc and 38.5 dB at 3.2 kHz. The estimated passband input-referred noise is 2.08 ¿Vrms.
Keywords :
CMOS analogue integrated circuits; amplifiers; biomedical electronics; electromyography; integrated circuit modelling; low-power electronics; switched capacitor networks; CSM triple-well CMOS process technology; capacitive load reduction circuit; capacitive-reset switched-capacitor circuit; frequency 3.2 kHz; gain 38.5 dB; gain 40 dB; passband input-referred noise; power 15.14 muW; realistic BSIM3 models; size 0.18 mum; ultra low-power CMOS amplifier; ultra low-power EMG amplifier; ultra low-power electromyograph amplifier; voltage 1.8 V; CMOS process; CMOS technology; Capacitance; Electromyography; Frequency; High power amplifiers; Operational amplifiers; Power amplifiers; Semiconductor device modeling; Switched capacitor circuits;
Conference_Titel :
Integrated Circuits, ISIC '09. Proceedings of the 2009 12th International Symposium on
Conference_Location :
Singapore
Print_ISBN :
978-9-8108-2468-6
