Title :
VLSI design to unify IDCT and IQ circuit for multistandard video decoder
Author :
Kim, Soojin ; Chang, Hoyoung ; Lee, Seonyoug ; Cho, Kyeongsoon
Author_Institution :
Dept. of Electron. & Inf. Eng., Hankuk Univ. of Foreign Studies, Yongin, South Korea
Abstract :
We describe a design method to unify the IDCT and IQ operations for three popular video compression standards such as H.264 (up to high profile), MPEG-4 and VC-1. We use the concept of delta coefficient matrix to implement the unified IDCT circuit. Our circuit supports 4-point and 8-point IDCT´s for H.264, MPEG-4 and VC-1. The unified IQ circuit uses a shared multiplier. The entire circuit was verified on the SoC platform board, synthesized into a gate-level circuit using 130 nm standard cell library and showed its efficiency in terms of the area.
Keywords :
VLSI; data compression; system-on-chip; video coding; IDCT; IDCT circuit; IQ circuit; SoC platform board; VLSI design; delta coefficient matrix; gate-level circuit; multistandard video decoder; shared multiplier; standard cell library; video compression standards; Circuit synthesis; Decoding; Design engineering; Design methodology; Digital multimedia broadcasting; Libraries; MPEG 4 Standard; Very large scale integration; Video compression; Video sharing; IDCT; IQ; VLSI; multi-standard video decoder;
Conference_Titel :
Integrated Circuits, ISIC '09. Proceedings of the 2009 12th International Symposium on
Conference_Location :
Singapore
Print_ISBN :
978-9-8108-2468-6
