Reuse of a HW/SW coverification environment during the refinement process of a functional C model down to an executable HW/SW specification

This paper presents a method reusing a coverification system testbench throughout the refinement process starting from a functional C model of a distributed system with the goal to optimize the HW/SW partitioning and distribution to multiple cores of a system. The partitioned system can then be used as an executable HW/SW specification in the ensuing design flow. The presented paradigm was validated using a distributed brake-by-wire design for the automotive industry.