A Controlled Threshold Low Power Nano-Crystal Memory

Experimental results of a threshold-shifting nano-memory are presented. The structure consists of a silicon field-effect transistor with nano-crystals of germanium or silicon placed in the gate oxide in close proximity of the inversion surface. Electron charge is stored in these isolated 5-10 nm size nano-crystals which are separated from each other by ≫ 5 nm of SiO2, and from the inversion layer of the substrate surface by sub-5 nm of SiO2. Charge is injected from the inversion layer and its storage in the nano-crystal causes a shift in the threshold voltage which is sensed via current. The nano-crystals are formed using implantaton and annealing or using direct deposition of the distributed floating gate region. Threshold shift of approx. 0.25 V is obtained in Ge-implanted devices with 2 nm of SiO2 injection layer by a 4 V write pulse of 200 ns duration. The nano-crystal memories achieve improved programming characteristics as a nonvolatile memory as well as simplicity of the single poly-Si-gate process. In the case of deposited nano-crystals the VT window is scarcely degraded after greater than 10⁹ write/erase cycles. Nano-crystal memories are promising for nonvolatile memory applications.