Static C-V Characteristics of Fully Depleted NMOS Devices on SOI

A novel steady state C-V technique is used to measure the static C-V characteristics of fully depleted NMOS capacitors on SOI substrates. The shape of C-V curves is significantly affected by the inversion channel at the buried oxide as induced by a high substrate bias. By analyzing gate current transients of individual steps of the C-V sweep, forward and reverse current voltage characteristics of the drain junction are deduced. The results clearly show smaller generation currents for unbiased NMOS capacitors on SOI compared to the case with back gate inversion.