Title :
Realisation of a 0.25 μm NMOSFET using GexSi1-x (x≪0.4) as Gate Material
Author :
Salm, C. ; Schmitz, I. ; Martens, M.C. ; Gravesteijn, D.J. ; Holleman, J. ; Woerlee, P.H.
Author_Institution :
MESA Research Institute, University of Twente, Dept. of Electrical Engineering, PO Box 217, 7500 AE Enschede, The Netherlands
Abstract :
The realisation a 0.25 μm NMOSFET using arsenic implanted GexSi1-x as gate material, with minimal changes in an existing process is reported. The etching of this gate material does not pose a problem and the underlying thin gate oxide is hardly attacked. We will show good transistor characteristics for both a 6nm and a 4.5 nm oxide thickness. VTroll-off is comparable for the poly-Si and poly-GexSi1-x gates.
Keywords :
Annealing; CMOS technology; Etching; Germanium silicon alloys; MOS devices; MOSFET circuits; Plasma applications; Plasma temperature; Silicidation; Silicon germanium;
Conference_Titel :
Solid State Device Research Conference, 1996. ESSDERC '96. Proceedings of the 26th European
Conference_Location :
Bologna, Italy
