Electrical and Morphological Characterization of Sub-Micron Silicon Devices

We present recent developments of the sample preparation technique used to obtain the morphological and electrical characterizations of typical VLSI devices. The technique is based on the selective chemical etch of doped silicon regions, coupled with transmission electron microscopy analysis for imaging the sample morphology. The mechanism of the etching process and its dependence on the dopant concentration are clarified. The high spatial resolution and feasibility of this technique are demonstrated by discussing specific applications, concerning the characterization of the emitter-base region in a high speed bipolar device and of the source-drain region in Flash memories.