DocumentCode :
513867
Title :
Impact of Latch Phenomenon on Low Frequency Noise in SOI MOSFETs
Author :
Jomaah, J. ; Dixkens, D. ; Pelloie, J.L. ; Raynaud, C. ; Balestra, F.
Author_Institution :
Laboratoire de Physique des Composants Ã\xa0 Semiconducteurs (UMR CNRS), ENSERG/INPG, BP 257, 38016 Grenoble, France.
fYear :
1996
fDate :
9-11 Sept. 1996
Firstpage :
87
Lastpage :
90
Abstract :
The low frequency noise in fully (FD) and partially (PD) depleted MOSFETs/SOI is experimentally investigated for various channel lengths and drain voltages. The origin of the noise is discussed in order to understand the physical mechanisms involved in this type of noise. Furthermore, the influence of the latch effect on low frequency noise is analysed. It is found that the flicker noise is essentially caused by the carrier number fluctuations and an excess noise is obtained in the presence of a parasitic bipolar action.
Keywords :
1f noise; Bipolar transistors; Fluctuations; Low-frequency noise; MOSFETs; Parasitic capacitance; Semiconductor device noise; Silicon on insulator technology; Thin film devices; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid State Device Research Conference, 1996. ESSDERC '96. Proceedings of the 26th European
Conference_Location :
Bologna, Italy
Print_ISBN :
286332196X
Type :
conf
Filename :
5436225
Link To Document :
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