Title :
BICMOSG3 Cell - A Novel High-Speed DRAM Cell Taking Full Advantage of BICMOS Technology
Author :
Richter, R. ; Winkler, W. ; Matzke, W.-E. ; Ehwald, K.E. ; Heinemann, B.
Author_Institution :
Institute for Physics of Semiconductors, Academy of Sciences of the GDR, Walter-Korsing-Str. 2, 1200 Frankfurt(Oder), GDR
Abstract :
The BiCMOSG3 cell, a novel high density memory cell using BiCMOS technology is described. The cell is based on merging four transistors and occupies approximately the area of a single MOS transistor. The implementation of three gain mechanisms and a bipolar output driver transistor into the cell ensures both a very high operation speed and a bit line read out signal of about 1 volt using only operation voltages between 0 and 5 volts. The BiCMOSG3 cell allows a completely selective access to single cells or groups of them. Therefore, the recharging of unselected bit lines is not necessary and the power dissipation of an array based on BiCMOSG3 cells is reduced compared to one-transistor cells.
Keywords :
Adaptive arrays; BiCMOS integrated circuits; Bipolar transistor circuits; Electron emission; JFET circuits; MOSFETs; Physics; Read-write memory; Voltage; Writing;
Conference_Titel :
Solid State Device Research Conference, 1989. ESSDERC '89. 19th European
Conference_Location :
Berlin, Germany