Self-aligned gined CoSi2 in a Submicron CMOS Process

The integration aspects of a self-aligned CoSi2 technology in a submicron CMOS process are described. The effect of substrate type and doping on the final sheet resistance of CoSi2 was investigated. No significant influence on the sheet resistance of the finally formed CoSi2 measured, appart from an effect on the formation of the intermediate CoSi phase. The stability of CoSi2 at high temperature was found to be significantly better on mono-Si than on poly-Si. Using amorphous Si as gate material a considerable improvement of the silicide stability was achieved. Overgrowth of CoSi2 (bridging) was detected by an electrical testing method and located by Voltage Contrast SEM analysis. The use of the CoSi2 salicide process did not provoke any serious degradation of transistor performance or gate oxide integrity. The results are comparable with those of TiSi2.