DocumentCode
514025
Title
A Self-aligned Isolation-oxide Process Before Gate Formation for Enhanced Packing Density of Megabit DRAMs
Author
Kuepper, P. ; Hasler, B. ; Roehl, S. ; Bolze, T. ; Diekmann, C. ; Mohr, H.G. ; Starflinger, W.
Author_Institution
Siemens AG, Dept. HL T, Otto-Hahn-Ring 6, 8000 Mnchen 83, West Germany
fYear
1989
fDate
11-14 Sept. 1989
Firstpage
143
Lastpage
146
Abstract
A new completely selfaligned isolation oxide etch process prior to gate oxidation was developped with resulting gate oxide quality, isolation properties and topology comparable to a process with mask.
Keywords
Capacitors; Cleaning; Dry etching; Oxidation; Plasma temperature; Random access memory; Strips; Topology; Uncertainty; Wet etching;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Device Research Conference, 1989. ESSDERC '89. 19th European
Conference_Location
Berlin, Germany
Print_ISBN
0387510001
Type
conf
Filename
5436648
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