Title :
Mobility Model for Sillicon Inversion Layers
Author :
Walker, A.J. ; Woerlee, P.H.
Author_Institution :
Philips Research Laboratories, 5600 JA Eindhoven The Netherlands
Abstract :
The room temperature low field mobility of electrons and holes in silicon inversion layers has been studied to improve the mobility modeling. Samples with gate oxide thicknesses between 10nm and 50nm and surface doping levels of up to 4.5 × 1017 cm¿3 have been used. Three scattering mechanisms were considered and an accurate mobility model, derived from these, will be presented.
Keywords :
Charge carriers; Equations; MOS devices; MOSFETs; Rough surfaces; Scattering; Semiconductor process modeling; Silicon; Surface roughness; Temperature;
Conference_Titel :
Solid State Device Research Conference, 1987. ESSDERC '87. 17th European
Conference_Location :
Bologna, Italy
