DocumentCode :
514095
Title :
A 18 μm2 cell for Megabit CMOS EPROM
Author :
Camerlenghi, E. ; Caprara, P. ; Crisenza, G.
Author_Institution :
SGS Microelettronica, via C. Olivetti 2, 20041 Agrate Brianza (MI)-Italy
fYear :
1987
fDate :
14-17 Sept. 1987
Firstpage :
765
Lastpage :
768
Abstract :
A process technology for realzizng highly compact EPROM devices has been described; in particular the structure and the electrical characterization of a 18 μm2 memory cell has been reported, pointing out good speed performances together with good manufacturability qualities. This technology has beein verified using 64K memory, and at present it is utilized to manufacture a 1Mbit memory.
Keywords :
CMOS process; CMOS technology; Computer architecture; EPROM; High performance computing; Memory architecture; PROM; Testing; Threshold voltage; Writing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid State Device Research Conference, 1987. ESSDERC '87. 17th European
Conference_Location :
Bologna, Italy
Print_ISBN :
0444704779
Type :
conf
Filename :
5436743
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=514095
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