Comparison of 11.5 μm2 Stacked Capacitor and Trench Capacitor Cells in Mbit Test Mnmory

A 1Mbit DRAM testcircuit with stacked capacitor or alternatively with trench capacitor cells has been fabricated in 4Mbit design rules and technology. The smaller capacitances obtained by the stacked capacitor at same cell sizes is compensated by reduced leakage currents and α-particle sensitivity. Both cells need a cell voltage of 5V for reliable operation.