Bit-Serial Correlator with Novel Clocking Scheme

This paper describes a single-chip, bit-serial correlator design for Spread-Spectrum applications. The device has an input data word of 4-bits which is correlated with 512 binary taps and operates at a sample rate of 2.4MHz (typical) producing a full-precision 13-bit sum. The internal architecture is bit-serial, and is driven by a clock (30MHz) derived from the external sample clock using the internal clock distribution network as a ring oscillator. The techniques are described which overcome the problems of clock-skew in this design.