DocumentCode :
516276
Title :
TOPICS: A New Hierarchical Design Tool using an Expert System and Interval Analysis
Author :
Leenaerts, D.M.W.
Author_Institution :
Department of Electrical Engineering, Eindhoven University of Technology, 5600 MB Eindhoven, the Netherlands
Volume :
1
fYear :
1991
fDate :
11-13 Sept. 1991
Firstpage :
37
Lastpage :
40
Abstract :
A TOP-down Integrated Circuit Synthesis expert system (TOPICS) which is able to design CMOS operational amplifiers (op-amps) is under development. The synthesis is based on a hierarchical design methodology and due to the fact that interval analysis is used and all solutions will be found the partitioning and mapping of the design constraints on a normal operating range of a collection of subblocks will always yield a solution.
Keywords :
CMOS technology; Circuit topology; Engines; Expert systems; Humans; Integrated circuit synthesis; Nonlinear equations; Operational amplifiers; Power dissipation; Process design;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 1991. ESSCIRC '91. Proceedings - Seventeenth European
Conference_Location :
Milan, Italy
Type :
conf
Filename :
5467880
Link To Document :
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