DocumentCode
516301
Title
A 256K NMOS EPROM
Author
De Subercasaux, Ch ; Gilles, J.
Author_Institution
THOMSON SEMICONDUCTORS/EUROTECHNIQUE, B.P. 2 - 13790 ROUSSET - FRANCE
fYear
1984
fDate
0-0 Sept. 1984
Firstpage
140
Lastpage
143
Abstract
A 256K EPROM will be described. This memory achieves a typical access time of 150 ns. It is fabricated with a 2 ¿m double polysilicon E/D NMOS technology. The cell size is 45,5 ¿m2. The chip size is 24 mm2, including 4 redundant rows. The majors features are a simplified process and a dynamic decoder, using an address transition detector circuit.
Keywords
Circuits; Clocks; Decoding; EPROM; Energy consumption; Etching; MOS devices; Regulators; Substrates; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1984. ESSCIRC '84. Tenth European
Conference_Location
Edinburgh, UK
Type
conf
Filename
5467905
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