DocumentCode
516345
Title
A Scalable Analog Implementation of Multilayer Boltzmann Machines
Author
Belhaire, Eric ; Pujol, Hubert ; Garda, Patrick
Author_Institution
INSTITUT D´´ELECTRONIQUE FONDAMENTALE/CNRS URA 22, Bat 220 Universiteé de Paris XI, 91405 Orsay Cedex, France
Volume
1
fYear
1993
fDate
22-24 Sept. 1993
Firstpage
74
Lastpage
77
Abstract
A new analog implementation of multilayer Boltzmann machines is described. Its intrinsic scalability has been achieved by original design of low-distorsion analog cells, cascadable random generators and digital interconnectios. Feasibility is demonstrated by the realization of a 1.2 GCPS unit.
Keywords
Automata; Equations; Multi-layer neural network; Neurons; Nonhomogeneous media; Pins; Prototypes; Random number generation; Scalability; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1993. ESSCIRC '93. Nineteenth European
Conference_Location
Sevilla, Spain
Print_ISBN
2-86335-134-X
Type
conf
Filename
5467951
Link To Document