A Silicon Compiler for a Particle Detector Chip

Author

Burke, S A ; York, T.A. ; Hatfield, J V ; Comer, J ; Hicks, P J

Author_Institution

Dept. of Electr. Eng. & Electron., UMIST, Manchester, UK

Volume

1

fYear

1990

fDate

19-21 Sept. 1990

Firstpage

69

Lastpage

72

Abstract

A silicon compiler has been produced which, from a short textual specification containing values of critical parameters, produces mask details for a particle counting chip. Initially it has been applied to a specific CMOS architecture having three distinct regions; a two dimensional array of sensitive electrodes with associated amplifiers and comparators, RAM for accumulating data and a controller. The compiler utilises a library of about 300 handcrafted cells and takes only 15 minutes to produce a 25 mm² layout.

Keywords

CMOS analogue integrated circuits; amplifiers; comparators (circuits); counting circuits; integrated circuit layout; particle detectors; random-access storage; CMOS architecture; RAM; amplifiers; comparators; controller; critical parameter values; data accumulation; mask details; particle counting chip; particle detector chip; silicon compiler; two-dimensional sensitive electrode array; Circuits; Costs; Electrodes; Electrons; Humans; Libraries; Microchannel; Physics; Radiation detectors; Silicon compiler;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 1990. ESSCIRC '90. Sixteenth European

Conference_Location

Grenoble

Print_ISBN

2-86332-087-4

Type

conf

Filename

5467983