Title :
An Interactive, Optimization based Tool for the Nominal Design of Integrated Circuits
Author_Institution :
AEG-TELEFUNKEN, Design Centre for Integrated Circuits, Ulm, F R Germany
Abstract :
This paper presents a general and efficient tool for the computer-aided nominal design of integrated circuits. The design method is based on an interactive optimization approach and on a soohisticated interface to the circuit level simulation package SPICE providing a high level tool for the task of designing cells at transistor level. The efficiency of the design tool proposed is demonstrated by an application to a multiple objective design task of an analogue circuit.
Keywords :
Circuit simulation; Circuit topology; Computational modeling; Design methodology; Design optimization; Economic forecasting; Error correction; Integrated circuit reliability; Resistors; SPICE;
Conference_Titel :
Solid-State Circuits Conference, 1985. ESSCIRC '85. 11th European
Conference_Location :
Toulouse, France