DocumentCode :
516428
Title :
An Interactive, Optimization based Tool for the Nominal Design of Integrated Circuits
Author :
Huss, Sorin A.
Author_Institution :
AEG-TELEFUNKEN, Design Centre for Integrated Circuits, Ulm, F R Germany
fYear :
1985
fDate :
16-18 Sept. 1985
Firstpage :
209
Lastpage :
213
Abstract :
This paper presents a general and efficient tool for the computer-aided nominal design of integrated circuits. The design method is based on an interactive optimization approach and on a soohisticated interface to the circuit level simulation package SPICE providing a high level tool for the task of designing cells at transistor level. The efficiency of the design tool proposed is demonstrated by an application to a multiple objective design task of an analogue circuit.
Keywords :
Circuit simulation; Circuit topology; Computational modeling; Design methodology; Design optimization; Economic forecasting; Error correction; Integrated circuit reliability; Resistors; SPICE;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 1985. ESSCIRC '85. 11th European
Conference_Location :
Toulouse, France
Type :
conf
Filename :
5468070
Link To Document :
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