ADULTS-L : A VLSI Layout Compactor

A VLSI layout compactor, ADULTS-L, is proposed. It can deal with both real physical mask patterns and symbolic patterns for VLSI layout. It features hierarchical design support and process independence. This paper describes a system configuration, an algorithm and a layout result of ADULTS-L. The main features of ADULTS-L are as follows; 1. It is a grid free layout compactor. 2. It can support a hierarchical design. 3. It is process independent. The first feature means that the system can treat manual, or physical, mask patterns. In addition, if components such as transistors and contacts are registered as symbols in a library, the system works as a symbolic layout compacotr. It is also easy for the system to treat transistors with arbitrary dimensions, P (or N) well areas and ion implantation patterns. The system supports the hierarchical design as follows. First, a chip to be compacted is divided into subchips (or blocks) hierarchically by a designer. Then, the system is applied to blocks from the lowest level to higher level. For a compacted block, "summary polygon" is defined for each mask layer. "Summary polygon" means the minimum polygon which contains all layout patterns for the layer. In the upper level block to be compacted, lower blocks are expressed by summary polygons without referring to detailed layout patterns. This makes the amount of data smaller. Summary polygons can be defined both automatically and manually. The system can be applied to not only MOS process but also bipolar process.