DocumentCode :
516449
Title :
A High Performance Integrated Circuit for Successive Detection Logarithmic Amplifiers
Author :
Cooke, M.P. ; Nicholls, A.D. ; Birch, M.J.
Author_Institution :
Plessey Research (Caswell), Limited, Caswell, Towcester, Northants, NN12 8EQ, U.K.
fYear :
1985
fDate :
16-18 Sept. 1985
Firstpage :
302
Lastpage :
307
Abstract :
A 1.3 GHz dual stage i.c. for logarithmic successive detection (s.d.) amplifiers is described. A complete amplifier using three i.c.´ s achieves a signal compression accuracy of ± 1dB over an input dynamic range of 65dB at a frequency of 450MHz. This device is aimed at electronic support measures (e.s.m.) systems and is also applicable to high performance signal regenerators such as those used in fibre optic data links.
Keywords :
Broadband amplifiers; Circuits; Detectors; Dynamic range; Fiber optics; Frequency; Optical amplifiers; Pulse amplifiers; Repeaters; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 1985. ESSCIRC '85. 11th European
Conference_Location :
Toulouse, France
Type :
conf
Filename :
5468131
Link To Document :
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