Title :
The Static Noise Margin of SRAM cells
Author_Institution :
Philips Research Laboratories Eindhoven, Nederlandse Philips Bedrijven B.V., P.O. Box 80.000, 5600 JA Eindhoven, The Netherlands.
Abstract :
A simulation method is presented which makes it possible to analyze the stability of SRAM cells in terms of Static Noise Margin (SNM). With this method the effect of supply voltage reduction below the conventional 5V on the stability of resistor load (R-load) and full CMOS (6T) SRAM cells is analyzed. Simulations are carried out with estimated transistor parameters of a sub-micron process. From the results it is concluded that full CMOS cells are much more stable at low supply voltages.
Keywords :
Analytical models; CMOS process; Flip-flops; Inverters; Noise figure; Noise reduction; Random access memory; Resistors; Stability analysis; Voltage;
Conference_Titel :
Solid-State Circuits Conference, 1986. ESSCIRC '86. Twelfth European
Conference_Location :
Delft, The Netherlands
